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ADT7468
when the system is powered on. If an SMBALERT is
Configuring the Relevant THERM Behavior
generated due to the THERM timer limit being exceeded,
1.
2.
Configure the desired pin as the THERM timer input.
Setting Bit 1 (THERM timer enable) of Configuration
Register 3 (Reg. 0x78) enables the THERM timer
monitoring functionality. This is disabled on Pins 14 and
20 by default.
Setting Bits 0 and 1 (PIN14FUNC) of Configuration
Register 4 (Reg. 0x7D) enables THERM timer output
functionality on Pin 20 (Bit 1 of Configuration Register 3,
THERM, must also be set). Pin 14 can also be used
as TACH4.
Select the desired fan behavior for THERM timer events.
Assuming that the fans are running, setting Bit 2 (BOOST
bit) of Configuration Register 3 (Reg. 0x78) causes all fans
to run at 100% duty cycle whenever THERM is asserted.
This allows fail-safe system cooling. If this bit is 0, the
fans run at their current settings and are not affected by
THERM events. If the fans are not already running when
another timestamp can be taken. The difference in time
can be calculated for a fixed THERM timer limit time. For
example, if it takes one week for a THERM timer limit of
2.914 secs to be exceeded and the next time it takes only
one hour, then this is an indication of a serious
degradation in system performance.
Configuring the THERM Pin as an Output
In addition to monitoring THERM as an input, the ADT7468
can optionally drive THERM low as an output. In cases where
PROCHOT is bidirectional, THERM can be used to throttle the
processor by asserting PROCHOT. The user can preprogram
system-critical thermal limits. If the temperature exceeds a
thermal limit by 0.25°C, THERM asserts low. If the temperature
is still above the thermal limit on the next monitoring cycle,
THERM stays low. THERM remains asserted low until the
temperature is equal to or below the thermal limit. Because the
temperature for that channel is measured only once for every
monitoring cycle, after THERM asserts it is guaranteed to
remain low for at least one monitoring cycle.
THERM is asserted, the fans do not run to full speed.
The THERM pin can be configured to assert low, if the
3.
4.
5.
Select whether THERM timer events should generate
SMBALERT interrupts.
Bit 5 (F4P) of Mask Register 2 (Reg. 0x75), when set, masks
out SMBALERTs when the THERM timer limit value is
exceeded. This bit should be cleared, if SMBALERTs based
on THERM events are required.
Select a suitable THERM limit value.
This value determines whether an SMBALERT is generated
on the first THERM assertion, or only if a cumulative
THERM a ssertion tim e limit is exceeded. A value of 0x00
causes an SMBALERT to be generated on the first THERM
assertion.
Select a THERM monitoring time.
This value specifies how often OS or BIOS level software
checks the THERM timer. For example, BIOS could read
the THERM timer once an hour to determine the cumula-
tive THERM assertion time. If, for example, the total
THERM assertion time is <22.76 ms in Hour 1, >182.08
ms in Hour 2, and >5.825 secs in Hour 3, this can indicate
that system performance is degrading significantly, because
THERM is asserting more frequently on an hourly basis.
Alternatively, OS or BIOS level software can timestamp
Remote 1, local, or Remote 2 THERM temperature limits are
exceeded by 0.25°C. The THERM temperature limit registers
are at Registers 0x6A, 0x6B, and 0x6C, respectively. Setting Bit 3
of Registers 0x5F, 0x60, and 0x61 enables the THERM output
feature for the Remote 1, local, and Remote 2 temperature
channels, respectively. Figure 33 shows how the THERM
pin asserts low as an output in the event of a critical
overtemperature.
THERM LIMIT
+0.25°C
THERM LIMIT
TEMP
THERM
ADT7468
MONITORING
CYCLE
Figure 33. Asserting THERM as an Output, Based on Tripping THERM Limits
An alternative method of disabling THERM is to program the
THERM temperature limit to –64°C or less in Offset 64 mode,
or ?128°C or less in twos complement mode; that is, for
THERM temperature limit values less than –63°C or –128°C,
respectively, THERM is disabled.
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